Electrical Engineer I
Northrop Grumman · Apopka, FL
RTL design, SoC integration, hardware bring-up, and qualification test for a space-qualified imaging program.
Details
- Designed a runtime-reconfigurable RTL sensor-emulation module (VHDL, PolarFire FPGA, AXI-Stream) for a space-qualified imaging system — adopted as the program's primary verification stimulus, unblocking downstream work ahead of real sensor hardware.
- Brought up a mixed-signal Ethernet data path (SGMII PHY, RISC-V softcore) to stable 1 Gbps, then isolated a TX/RX pin-mapping defect that was silently dropping packets before it reached production hardware.
- Built a three-solenoid lifecycle qualification rig — custom protection circuitry, MSP430 firmware, synchronized DAQ/scope/UART — running 5-million-cycle campaigns at 2× projected mission life and cutting the qualification schedule roughly threefold.